API NetWorks Announces Support of AMD’s New HyperTransport™ Technology for Next-Generation Networking and Computing Equipment
API NetWorks today announced its support of AMD's HyperTransport technology, the high-speed, point-to-point I/O interconnect formerly known as Lightning Data Transport (LDT), and outlined a strategy to bring HyperTransport-based silicon and platforms to networking and computing equipment makers. API NetWorks co-developed the technology with AMD.
CONCORD, Mass. — February 14, 2001 — API NetWorks, Inc. today announced that it will support AMD's newly named HyperTransport technology across a planned family of products for next-generation networking, communications and computing equipment. As a co-developer of the interconnect, API NetWorks contributed engineering work to the specification and intends to be among the first companies to deliver HyperTransport devices, reference designs and development platforms to the market.
The announcement coincides with AMD's public introduction of the HyperTransport name for the technology previously discussed under the working name LDT. It also marks a significant broadening of API NetWorks' business: in addition to its Alpha motherboards and servers, the company is now building chip-level interconnect products that can be used with many different processors.
The I/O bottleneck
Processors, memory and network links had all become dramatically faster through the late 1990s, but the buses connecting chips inside a system had not kept pace. Shared parallel buses such as PCI were limited in bandwidth, required many pins, and became harder to run at higher clock rates as board traces grew longer. Designers of routers, switches, storage systems and servers increasingly found that data could not move between chips as fast as the chips themselves could process it.
HyperTransport replaces the shared bus with narrow, fast, point-to-point links. Each link is a pair of unidirectional connections that carry packets using low-voltage differential signaling and double-data-rate transfers. Because links are point-to-point, they can be clocked much higher than a multi-drop bus, and because they are narrow, they need far fewer pins for the same bandwidth.
Key technical characteristics
| Characteristic | HyperTransport (initial specification) |
|---|---|
| Topology | Point-to-point links, daisy-chained or through bridges and switches |
| Link widths | 2, 4, 8, 16 or 32 bits in each direction |
| Clock | Up to 800 MHz, data transferred on both edges |
| Peak bandwidth | Up to roughly 12.8 GB/s aggregate on a 32-bit link pair |
| Signaling | Low-voltage differential |
| Protocol | Packet-based, with support for posted and non-posted transactions |
| Software model | Compatible with PCI configuration and enumeration |
PCI software compatibility is a particularly important design choice. Operating systems and drivers see HyperTransport devices through the familiar PCI configuration model, so existing software can be carried forward while the hardware underneath becomes much faster.
API NetWorks' technology strategy
API NetWorks plans to bring HyperTransport to market along several fronts:
- Bridges that connect HyperTransport links to existing I/O standards, beginning with PCI, so that designers can adopt the new interconnect while continuing to use established peripheral chips.
- Switching and tunnel devices that allow multiple HyperTransport links and devices to be combined into larger fabrics inside a system.
- Reference designs and development platforms so equipment makers can evaluate HyperTransport and begin product development quickly.
- Design services and engineering support drawing on the company's high-speed board and system design experience.
The strategy builds on skills API developed designing Alpha platforms such as the UP2000 and the CS20 server, where moving data quickly between processors, memory and I/O was the central engineering challenge.
Who benefits
- Networking and communications equipment makers building routers, switches and access equipment that need high internal bandwidth with low pin counts.
- Server and workstation designers seeking a faster path between processors, chipsets and peripherals.
- Storage system vendors moving large volumes of data between controllers and host interfaces.
- Embedded system designers who value an open, royalty-friendly interconnect with PCI software compatibility.
Every generation of faster processors makes the connections between chips more important. HyperTransport gives designers a way to move data at processor speeds without a sea of pins, and we intend to make it easy to adopt.
An API NetWorks engineer
A new direction for API NetWorks
API was founded to make the Alpha architecture mainstream, and that work continues through its boards, servers and partners. HyperTransport opens a second, processor-independent line of business. Interconnect silicon can serve many markets, from communications equipment to personal computers, and positions the company in the part of the system that every design needs regardless of which processor sits at its center.
About API NetWorks, Inc.
API NetWorks, Inc., formerly Alpha Processor, Inc., is headquartered in Concord, Massachusetts. The company was founded in 1998 as a joint effort of Samsung and Digital Equipment Corporation, later Compaq, to bring the 64-bit Alpha RISC architecture into mainstream markets. API designs and markets Alpha motherboards, processor modules, high-density rack servers and system-level building blocks for Linux and Tru64 UNIX, and supplies them to OEMs, system integrators and cluster builders worldwide. Through its API NetWorks unit the company is extending its high-performance design expertise into interconnect silicon and platforms for networking and communications equipment.